Pull-Up During Configuration (bar) Active-Low PUDC_B input enables internal pull-up resistors on the SelectIO pins after power-up and during configuration.
• When PUDC_B is Low, internal pull-up resistors are enabled on each SelectIO pin.
• When PUDC_B is High, internal pull-up resistors are disabled on each SelectIO pin.
PUDC_B must be tied either directly, or via a ≤ 1kΩ to VCCO_14 or GND.
Caution! Do not allow this pin to float before and during configuration.
参考文献：
https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
http://china.xilinx.com/support/answers/50802.html
http://blog.csdn.net/techexchangeischeap/article/details/72698529
原文：http://www.cnblogs.com/ifpga/p/7067857.html