首页 > 其他 > 详细

【电路】pmic芯片设计细节

时间:2018-11-12 14:23:18      阅读:190      评论:0      收藏:0      [点我收藏+]
  • VIO_IN供电

  https://e2e.ti.com/support/power-management/f/196/t/712146?tisearch=e2e-sitesearch&keymatch=tps65916

Note that every GPIO will be configured as an input for the first 6ms after VCC is supplied, which is the time it takes for the device to initalize based on OTP settings. Therefore it‘s not recommended to pull up any GPIO to a signal which is active during this time, such as VRTC or an always-on VIO signal.
For example, GPIO_0 is commonly used as an enable for a 3.3V load switch. If you want it to be at 1.8V, it is recommended to pull GPIO_0 up to VDDS18V (SMPS4) instead of LDOVRTC, so that the 3.3V switch does not get activated when VCC is supplied.

 

【电路】pmic芯片设计细节

原文:https://www.cnblogs.com/kevinchase/p/9946108.html

(0)
(0)
   
举报
评论 一句话评论(0
关于我们 - 联系我们 - 留言反馈 - 联系我们:wmxa8@hotmail.com
© 2014 bubuko.com 版权所有
打开技术之扣,分享程序人生!