2-2 描述风格

‘timescale 1ns/100ps //延时时间单位1ns，时间精度100ps

 1 ‘timescale 1ns/100ps
 2 module decoder_24(A, B, EN, Q);
 3     input A, B, EN;
 4     output [0:3] Q;
 5     wire Abar, Bbar;
 6     assign #1 Abar = ~A;
 7     assign #1 Bbar = ~B;
 8     assign #2 Q[0] = ~(Abar & Bbar & EN);
 9     assign #2 Q[1] = ~(Abar & B & EN);
10     assign #2 Q[2] = ~(A & Bbar & EN);
11     assign #2 Q[3] = ~(A & B & EN);
12 endmodule

 1 ‘timescale 1ns/100ps
 2 
 3 module adder1(a, b, cin, sum, cout);//一位全加器
 4     input a, b, cin;
 5     output sum, cout;
 6     
 7     always @(a or b or cin) begin
 8         sum <= (a^b)^cin;
 9         cout <= ((a&cin)|(b&cin)|(a&b));
10     end
11 endmodule
12 
13 
14 module test(lr ,rn); //initial示例
15     output reg lr, rn;
16     initial 
17         begin
18             lr = 0;
19             rn = 1;
20             lr = #5 1;
21             rn = #8 0;
22         end
23 endmodule

 1 //一位全加器
 2 
 3 module adder1(a, b, cin, sum, cout);
 4     input a, b, cin;
 5     output sum, cout;
 6     wire s1, t1, t2, t3;
 7     xor
 8         ux1(s1, a, b),
 9         ux2(sum, s1, cin);
10     and
11         tm1(t1, a, b),
12         tm2(t2, a, cin),
13         tm3(t3, b, cin);
14     or 
15         uo(cout, t1, t2, t3);
16 endmodule
17 
18 //四位全加器
19 
20 module Adder4(fa, fb, fcin, fsum, fcout);
21     parameter size = 3;
22     input [size : 0] fa, fb;
23     input fcin;
24     output [size : 0] fsum;
25     output fcout;
26     wire [size - 1 : 0] ftemp;
27     
28     adder1 //按对应端口名连接
29         ufa1(.a(fa[0]), .b(fb[0]), .cin(fcin),      .sum(fsum[0]), .cout(ftemp[0])),
30         //ufb1(fa[0], fb[0], fcin, fsum[0], ftemp[0]), //按端口顺序连接，下同
31         ufa2(.a(fa[1]), .b(fb[1]), .cin(ftemp[0]), .sum(fsum[1]), .cout(ftemp[1])),
32         ufa3(.a(fa[2]), .b(fb[2]), .cin(ftemp[1]), .sum(fsum[2]), .cout(ftemp[2])),
33         ufa4(.a(fa[3]), .b(fb[3]), .cin(ftemp[2]), .sum(fsum[3]), .cout(fcout));
34 endmodule