vivado ram核同时读写疑问

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 2021/01/30 08:07:49
// Design Name:
// Module Name: ramIP_tb
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
module ramIP_tb();

reg clk,clkTFT; //50M , 33M
initial clk = 1;
initial clkTFT = 1;
always #10 clk = ~clk;
always #15 clkTFT = ~clkTFT;

reg rst_n;
reg [15:0] din;
reg wea, enb;
reg [15:0] addra;
reg [15:0] addrb;
wire [15:0] dout;
initial begin
rst_n = 0;
din = 0;
enb = 0;
addra = 0;
addrb = 0;
#303;
rst_n = 1;
//把ram写满
repeat(65536) begin
wea=1;
#20;
din =din +1;
addra = addra+ 1;
end
wea=0;

// #10000;
#9997; enb=1;
#3;
//读ram
repeat(65536) begin
#30;
addrb = addrb+ 1;
end
#30;
enb=0;
#10000;

  //读写同时有效，发现读出来的数据是刚刚写进去的值。
  addra=16‘h0000;
  din = 16‘h1111;
  wea=1;
  enb=1;
  #100;
  wea=0;
  enb=0;
  #1000;

  enb=1;
  #100;
  enb=0;

  #10000;
  $stop;

end

ram16X64K ram(.clka(clk),
.ena(1),
.wea(wea),
.addra(addra),
.dina(din),
.clkb(clkTFT),
.enb(enb),
.addrb(addrb),
.doutb(dout)
);
endmodule

vivado ram核同时读写疑问

原文：https://blog.51cto.com/14018328/2611945