Input and MAR
Below the program counter is the input and MAR block.
It includes the address and data switch registers. These switch registers are part of the input unit which allow you to send 4 address bits and 8 data bits to RAM. As you recall, instruction and data words are written into the RAM before a computer run.
The memory address register(MAR) is part of teh memory. During a computer run, the address in the program counter is latched into the MAR. A bit later, the MAR applies this 4-bits address to teh RAM, where a read operation is performed.
1 library IEEE; 2 use ieee.std_logic_1164.all; 3 use ieee.numeric_std.all;
4
6 entity MAR is 7 port 8 ( 9 CLK : in std_logic; --! Rising edge clock 10 CLR : in std_logic; --! Active high asynchronous clear 11 LM : in std_logic; --! Active low load MAR 12 D : in std_logic_vector(3 downto 0); --! MAR 4-bit address input 13 Q : out std_logic_vector(3 downto 0) --! MAR 4-bit address output 14 ); 15 end MAR ; 16 17 architecture beh of MAR is 18 begin 19 20 process (CLR,CLK,LM,D) 21 begin 22 if CLR = ‘1‘ then 23 Q <= "0000"; 24 elsif LM = ‘0‘ then 25 if (CLK‘event and CLK = ‘1‘) then 26 Q <= D; 27 end if; 28 end if; 29 end process; 30 31 end beh;
原文：http://www.cnblogs.com/mengdie/p/4587139.html